Synopsys「IC Compiler」による自動DRC修正、MCMM最適化、デザイン収束を高速化

EDA関連ニュース

http://www.eda-express.com/2011/02/synopsysic-compilerdrcmcmm.html

The Power of Assertions in SystemVerilog

The Power of Assertions in SystemVerilog

Open Verification Methodology Cookbook

Open Verification Methodology Cookbook

ESL Models and their Application: Electronic System Level Design and Verification in Practice (Embedded Systems)

ESL Models and their Application: Electronic System Level Design and Verification in Practice (Embedded Systems)

Creating Assertion-Based IP (Integrated Circuits and Systems)

Creating Assertion-Based IP (Integrated Circuits and Systems)